The present invention relates to a resource management device for managing access from bus masters to a shared resource in a multi-bus-master/multi-bus data processing system in which at least one bus master is connected to each of a plurality of buses.
In a case where a plurality of bus masters share a resource via a common bus in a system LSI, it is necessary to efficiently arbitrate requests to access the resource. Herein, the bus master may be a microprocessor, a DSP (Digital Signal Processor), a DMA (Direct Memory Access) controller, etc., and the shared resource may be a memory, a peripheral I/O (input/output) controller, etc.
Japanese Laid-Open Patent Publication No. 52-103935 discloses a multi-processor system, in which a scan circuit issues access grant signals cyclically for granting access to the shared memory from each processor. The processor can access the shared memory when both an access request signal from the processor and the access grant signal from the scan circuit are active. Therefore, each processor can have chance to access the shared memory fairly.
U.S. Pat. No. 6,070,205 discloses a system for arbitrating use of the bus among a plurality of bus masters, in which a set of priority order information is provided, and the bus master to be granted use of the bus in the next cycle is determined according to the priority order information.
U.S. Pat. No. 5,931,924 discloses a data processing system, in which bus masters are randomly given the highest priority for accessing a shared resource.
U.S. Pat. No. 5,948,089 discloses a computer bus system, in which a synchronous bus is used in combination with a two-level arbitration scheme where the first level of arbitration is a framed, time-division-multiplexing arbitration scheme and the second level is a fairly-allocated round-robin scheme implemented using a token-passing mechanism.
U.S. Pat. No. 5,533,205 discloses a multimedia computer system, in which during selected time intervals the arbitration level indicators associated with a particular presentation devices are temporarily reordered to guarantee bus access at the required data rate.